The TRCSTALLCTLR enables ETM-Teal to stall the processor if the ETM-Teal FIFO goes over the programmed level to minimize risk of overflow
| LEVEL | Threshold at which stalling becomes active. This provides four levels. This level can be varied to optimize the level of invasion caused by stalling, balanced against the risk of a FIFO overflow |
| ISTALL | Stall processor based on instruction trace buffer space |
| INSTPRIORITY | Reserved, RES0 |